circuit note cn- 0147 circuits from the lab? tested circuit designs address common design challenges and are engineered for quick and easy system integration. for more information and/or support, visit www.analog.com/cn0147 . device s connected /referenced ADF4350 fractional - n pll ic with i ntegrated vco adp150 low noise 3.3 v ldo powering a fractional - n voltage controlled oscillator ( v co ) with low noise ldo regulators for reduced phase noise rev . c circuits from the lab? circuits from analog devices have been designed and built by analog devices engineers. standard engineering practices have been employed in the design and construc tion of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. however, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. accordingly, in no event shall analog devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any circuits from the lab circuits. (continued on last pa ge) one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com/circuits fax: 781.461.3113 ? 2010 C 2011 analog devices, inc. all rig hts reserved. evaluation and desig n support circuit evaluation boards ADF4350 evaluation board ( eval - ADF4350 - eb1z ) design and integration files schematics, layout files, bill of materials circuit function and benefits this circuit uses low noise , low dropout (ldo) linear regulators to supply power to a wideband integrated pll and vco . wideband v oltage c ontrolled o sc illators ( vcos ) may have increased sensitivity to power supply noise , hence , ultra low noise regulators are recommended for best performance. the circuit shown in figure 1 utilizes the ADF4350 , a fully integrated fractional - n pll and vco that can generate frequencies from 137.5 mhz to 4400 mhz . the ADF4350 is powered from the ultra low noise 3.3 v adp150 regulator for optimal lo phase noise performance. 2700pf 1200pf 39nf 680 ? 360 ? spi-compatible serial bus ADF4350 v vco v vco cp gnd agnd d gnd rf out b? rf out b+ cp out 1nf 1nf 4.7k ? r set le data clk ref in fref in v tune dv dd av dd ce muxout 10 28 16 29 1 2 3 22 8 31 9 11 18 21 27 v dd lock detect 51 ? a gndvco 14 15 19 23 24 25 30 ld 17 20 7 pdb rf 26 sd gnd temp vcom v ref 6 32 sdv dd v p 5 sw 10pf 0.1 f 10pf 0.1 f 10pf 0.1 f 4 rf out a? rf out a+ 13 12 v vco 3.9nh 3.9nh 1nf 1nf nc = no connect adp150 1 2 3 5 4 c out 1f c in 1f v out = 3.3v v in = 5.5v vout nc vin gnd en off on nc = no connect adp150 1 2 3 5 4 c out 1f c in 1f v out = 3.3v v in = 5.5v vout nc vin gnd en off on 08876-001 figure 1. adp150 r egulators c onnected to ADF4350 (simplified schematic: all connections and decoupling not shown)
cn- 0147 circuit note rev. c | page 2 of 4 08876-002 figure 2 . eval - adf 4 350eb1z rev. b evaluation board featuring adp150 low noise r egulators the lower integrated rms noise of the adp150 ldo of only 9 v rms (10 hz to 100 khz) helps to minimize vco phase noise and reduce the imp act of vco pushing (the vco equivalent of power supply rejection). figure 2 shows a photo of the evaluation board, which uses the adp150 ldos to power the ADF4350 . the adp150 represents the industrys lowest noise ldo in the smallest package at the lowest cost. it is available in a 4 - ball, 0.8 mm 0.8 mm, 0.4 mm pitch wlcsp or a convenient 5 - lead tsot package. adding the adp150 s to the design, therefore, has minimal impact on system cost and board area while providing a significant improvement in phase noise. circuit description the ADF4350 is a wideband pll and vco consisting of three separate multi band vcos. each vco covers a range of approximately 700 mhz (with some overlap between vcos ). lower frequencies are generated by output di viders. vco pushin g is measured by applying a steady dc tuning voltage to the ADF4350 v tune pin, varying the power supply voltage , and measuring the frequency change . the pushing figure (p) equals the frequen cy delta divided by the voltage delta , as shown in table 1 . in a pll system, higher vco pushing means that power supply noise will degrade the vco phase noise. if vco pushing is low, then power supply noise will not significantl y degrade phase noise . however, for high vco pushing, noisy power supplies will have a measurable impact on phase noise performance. table 1 . ADF4350 vco p ushing vco f reuenc m v tn v vco p ushing m/v 2200 2.5 0.73 3300 2.5 1.79 4400 2.5 5.99 08876-003 spectrum analyzer [r&s fsup 26] power supply eval-ADF4350eb1z rev b board 5.5v rf out pc usb cable figure 3. ADF4350 measurement setup experiments showed pushing to be at its maximum at 4.4 ghz vco output frequency, so the comparison of vco performance with different regulator s was made a t this frequency. rev . a evaluation boards of the ADF4350 used the adp3334 ldo regulator. the i ntegrated rms noise of this regulator is 27 v (integrated from 10 hz to 100 khz) . this compares to 9 v for the adp150 , which is used on the e va l - ADF4350eb1z , rev b. in order to measure the impact of the power supply noise, a narrow pll loop bandwidth (10 khz) was used to facilitate grea t er examination of vco phase noise. a diagram of this setup is shown in figure 3 . a more detailed examination of the output noise density with frequency is available from the data sheet s of both the adp3334 and adp150 . figure 4 shows that the noise spectral density of the adp3334 regulator is 150 nv/hz at 100 khz offset. the same plot for the adp150 ( figure 5 ) shows 25 nv /hz. the formula for calculating the degradation in phase noise due to the p ower supply noise is as follows: ? ? ? ? ? ? ? ? = fm sfm p l (ldo) 2 log 20 where l (ldo) is the noise contribution from the regulator to the vco phase noise (in dbc/hz) , at an offset fm ; p is the vco pushing figure in hz/v; sfm is the noise spectral density at a given frequency offset i n v/hz; and fm is the frequency offset at which the noise spectral density is measured in hz.
circuit note cn- 0147 rev. c | page 3 of 4 08876-004 100 10 1 0.1 0.01 0.001 10 100 1k 10k 100k 1m voltage noise spectral density (v/ hz) frequency (hz) v out = 2.2v i l = 1ma c l = 10f c nr = 10nf c l = 10f c nr = 0 c l = 1f c nr = 0 c l = 1f c nr = 10nf figure 4. adp3334 o utput n oise s pectrum 08876-005 0.501 0.001 0.051 0.101 0.151 0.201 0.251 0.301 0.351 0.401 0.451 10 100 1k 10k 100k noise (v/ hz) frequency (hz) v out = 1.8v v out = 2.8v v out = 3.3v figure 5. adp 150 output noise spectrum the noise contribution f rom the supply is t h en rss summed with the noise contribution of the vco ( itself measured with a very low noise supply) to give the total noise at the vco output with a given regulator . these noise performances are rss summed together to give the expected vc o phase noise : 2 2 (ldo) (vco) (total) l l l + = or expressed in db [ ( ) ( ) ] 2 20 / 2 20 / 10 10 log 10 lldo lvco (total) l + = in this example, a 100 khz noise spectral density offset is chosen, a 6 mhz/v pushing figure is used, and ? 110 dbc/hz is taken as the vco noise with an ideal supply. using a dedicated signal source analyzer (like rohde & schwarz fsup), the vco phase noise is compared. at 100 khz offset the adp3334 delivers ? 102.6 dbc/hz ( figure 6 ), and in the same configuration the adp150 measures ? 108.5 dbc/hz ( figure 7 ). table 2. calculation and measurement of vco noise adp3334 adp150 noise contribution from regulator ( nv/hz ) 150 25 noise contribution from regulator ( dbc/hz ) ? 104 ? 119.5 total calculated n oise at vco output (dbc/hz) ? 103 ? 109.5 measured vco noise at 100 khz offset (dbc/hz) ? 102.6 ? 108.5 08876-006 figure 6. ADF4350 p hase n oise at 4.4 ghz with adp 3334 regulators 08876-007 figure 7. ADF4350 p hase n oise at 4.4 ghz with adp 150 regulators the integrated phase noise improve s from 1.95 to 1.4 rms also. the measured results correlate very closely with the calculations and clea rly show the benefit of using the adp150 with the ADF4350 . a complete design support package for this circuit note can be found at http://www.analog.com/cn0147 - designsupport .
cn- 0147 circuit note rev. c | page 4 of 4 c ommon variations additional regulators can be added for greater isolat ion between power supplies , if desired . also , one adp150 regulator c an be used to power the entire ADF4350 part. however, care needs to be taken in this case to ensure the maximum rated current of the single adp150 regulator is not exceeded. this is possible if the lowest output p ower setting on the ADF4350 is selected. circuit evaluation a nd test this c ircuit n ote , cn - 0147 , uses the eval - ADF4350eb1z board for evaluation of the describ ed ci r cuit, a llowing for quick setup and evaluation. the eval - ADF4350eb1z board uses the standard ADF4350 progra m ming software , contained on the cd that accompanies the evaluation board. equipment needed wi ndows? xp, windows, vista (32 - bit), or windows 7 (32 - bit) pc with usb port, the eva l - ADF4350eb1z , the ADF4350 programming software , 5.5 v power supply , and a spectrum analyzer such as a rhode and schwartz fsup26 . s ee this circuit n ote cn - 0147 and ug - 109 user guide for evaluation board e va l - adf435 0 eb1z and the ADF4350 data sheet . getting started th is circuit note , cn - 0147, c ontains a description of the circuit, the schematic, and a block diagram of the test setup. the ser g uide , ug - 109 , details the installation and use of the eval - ADF4350 evaluation software. ug - 109 also co ntains board setup instructions and the board schematic, layout, and b ill of m aterial s. functional block diagram this circuit n ote , cn - 0147 , contains the function b lock d iagram of the described test setup in figure 3 . setup and test after setting up the equipment, standard rf test methods should be used to measure the spectral purity of the output signal . learn more cn0 147 design support package: http://www.analog.com/cn0147 - designsupport adisimpll design tool adisimpower design tool basso , c. , c. fourtet, and p. kadanka . get the best from y our low - dropout regulator . edn , 18 feb. 1999. data sheets and evaluation boards ADF4350 data sheet ADF4350 evaluation board adp150 data sheet adp3334 data sheet revision history 6/11 rev. b to rev. c changes to circuit description ....................................................... 2 11/10 rev. a to rev. b ad ded evaluation and design support section ............................ 1 added circuit evaluation and test section ................................... 4 7/10 rev. 0 to rev. a change s to figure 1 ........................................................................... 1 change s to figure 3 ........................................................................... 2 4 / 10 revision 0 : initial version (continued from first page) circuits from the lab circuits a re intended only for use with analog devices products and are the intellectual property of analog devices or its licensors. w hile you may use the circuits from the lab circuits in the design of your product, no other license is granted by implication or ot herwise under any patents or other intellectual property by application or use of the circuits from the lab circuits. information furnished by analog devices is believed to be a ccurate and reliable. however, circuits from the lab circuits are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfrin gement or fitness for a particular purpose and no responsibility is assumed by analog devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. analog devices res erves the right to change any circuits from the lab circuits at any time without notice but is under no obligation to do so. ? 2010C 2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. cn08876 - 0 - 6/11(c)
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